1. Field of the Invention
The present invention relates to a high frequency switch circuit, and is to realize a switch circuit having a high input power characteristic.
2. Description of Related Art
As mobile communication equipment has become more sophisticated in recent years, it has been desired to miniaturize high frequency semiconductor devices for use in terminal units and to improve their performance. In particular, a high frequency switch circuit to switch an antenna has been required to have lower insertion loss, lower distortion, and higher input power simultaneously.
Furthermore, mobile communication equipment that is capable of handling plural frequencies often uses a switch capable of making a “1-to-n” selection (hereinafter called “SPnT switch”) as the switch to switch an antenna. Typically, a junction type field effect transistor (hereinafter called “J-FET”) formed on a GaAs substrate is used for such a switch to switch an antenna.
A SPnT switch has a single or several field effect transistors (hereinafter called “FETs”) connected as a switch element between plural output terminals (or input terminals) and a single input terminal (or output terminal), and connects given input and output terminals by inputting a control signal to the control electrode (gate electrode) of the FET.
In such a switch element using a FET, the response time to the control signal is delayed due to the gate capacitance or the like. Accordingly, Japanese Unexamined Utility Model Application Publication No. 4-89623 discloses a technique to reduce the switching time between the on/off states of a metal oxide semiconductor field effect transistor (hereinafter called “MOSFET”) by connecting bidirectional diodes 200 in parallel between the gate electrode of the MOSFET and a pulse generator 100 (see FIG. 12).